This invention relates to an electro-optic display device for displaying continuously updated image information represented by signals arranged in successive frames, and more particularly relates to the driver circuits employed to address the display device with the image information signals.
Display devices of this type employ a row-and-column matrix array of pixels, for modulating light in accordance with the image information signals applied during successive frame periods. In color displays, each frame is typically divided into sub-frames, one for each component color of the color signal. The signal information is applied to the pixel array, usually a row at a time during each frame or sub-frame period, by electronic driver circuits.
These electronic drivers and their interconnection to the array make up a significant portion of the cost of a display device. For this reason, manufacturers are attempting to integrate the driver circuits into the display device itself. Electro-optic displays such as liquid crystal displays (LCDs), are analog by nature. For example, the light transmissivity of a twisted nematic (TN) LC varies with the amount of voltage applied across the LC cell. In order to ease interfacing to the emerging digital environment, the most desirable driver circuits are therefor those which accept digital input signals and convert them into analog signals.
For a high quality picture, a large number of gray shades must be represented by such signals, preferably on a perceptually harmonic scale, such that all brightness steps in the display are virtually indistinguishable by a human observer. For this purpose, 256 gray levels, corresponding to 8 bit digital data, are considered adequate.
A conceptually simple design for such a digital driver circuit is described by A. Erhart, SID 92 Digest, 41.4: xe2x80x9c256-Grey-Level Column Drivers: A Review of Two IC Architecturesxe2x80x9d, pp. 793-797. In this design, the incoming digital signal is sampled by a large number of column driver circuits, and the samples are compared to a common ramp-shaped analog signal, generated internally or externally. As long as a switch in the sampling circuit remains closed, the column lines simply track the common analog voltage of the ramp generator. D/A conversion of the samples is achieved when the analog voltage of the ramp generator corresponds to the digital word stored in the column register, causing the switch to open. When the switch opens, the ramp voltage value of that moment is stored by the column line capacitance, until the end of the row address interval (or Row period) when the pixel transistor switch is turned off. From that moment, the column voltage remains stored on the pixel capacitance until it is refreshed again in a next frame period.
At the high sampling rates needed for high quality displays, common problems of this design are voltage loss due to the resistance of the switch and the column line, and the transmission delay of the column line. The result is that the voltage stored in the column line capacitance is not equal to the ramp voltage at the moment of sampling.
Although it is desirable to keep absolute sampling errors smaller than one half of the smallest step, ie., one half of a least significant bit (LSB), it may not be feasible, practical or cost effective to implement the low switch and column line resistances necessary to achieve this goal.
Accordingly, it is an object of the invention to provide a driver circuit and method for driving an electro-optic display device for displaying continuously updated image information signals arranged in successive frames, in which the effects of sampling errors are reduced or eliminated.
It is another object of the invention to provide such a circuit and method, in which the effects of sampling errors from the digital-to-analog conversion of the information signals are reduced or eliminated.
In accordance with the invention, the effects of sampling errors introduced during digital-to-analog conversion of information signals in such a driver circuit are effectively cancelled by generating two sets of analog information signals in which sampling errors are equal in magnitude but opposite in sign, and addressing alternate columns (or rows), or alternate sets of columns (or rows), with these information signals, whereby the effects of the sampling errors in the display are reduced or eliminated.
In accordance with a first aspect of the invention, a driver circuit is provided for driving an electro-optic display device comprised of a row-and-column matrix array of pixels, to display continuously updated image information in the form of signals arranged in successive frames, by modulating light in accordance with the signals during successive frame periods, the circuit comprising a digital-to-analog converter for converting a first set of digital information signals into a first set of analog information signals having sampling errors, and for converting a second set of digital information signals into a second set of analog information signals having sampling errors equal in magnitude but opposite in sign to the sampling errors of the first set, and means for alternately applying the first and second sets of analog information signals to the array, whereby the average effect of t he sampling errors is zero.
In accordance with a preferred embodiment of this aspect of the invention, the driver circuit includes means for applying the first and second sets of analog information signals to alternate columns (or rows) of the array, or to alternate sets of columns (or sets of rows) during each frame period, so that sampling errors in adjacent columns (or rows), or adjacent sets of columns (or sets of rows), are equal in magnitude but opposite in sign for each frame period. The sampling errors are thus averaged over the array during each frame period.
In accordance with another preferred embodiment of this aspect of the invention, the digital-to-analog converter includes:
a first analog ramp signal generator for generating a ramp signal which begins at zero or a low absolute voltage value and ramps up to a maximum absolute voltage value; means for successively comparing the first set of digital information signals to the analog ramp up signal; and means for selecting the analog information signal values which correspond to the digital information signals; and
a second analog ramp signal generator for generating a ramp signal which begins at a maximum absolute voltage value and ramps down to zero or a low absolute voltage value; means for successively comparing the second set of digital information signals to the analog ramp down signal; and means for selecting the analog information signal values which correspond to the digital information signals.
The driver circuit may alternately include means for applying the first and second sets of analog information signals to the array during alternate frame periods, so that sampling errors in alternate frames are equal in magnitude but opposite in sign. In this case, the digital-to-analog converter may employ a single analog ramp signal generator having means for alternately generating a first analog ramp up signal and a second analog ramp down signal, and the digital-to-analog conversion can proceed for an entire frame of digital information signals using the first ramp signal, and for the next frame using the second ramp signal. The sampling errors are thus averaged over a time of successive frame periods, instead of being averaged over the array during each frame period. The digital-to-analog converter includes means for successively comparing the digital information signals to the analog ramp signal; and selecting analog information signal values which corresponds to the digital information signals.
In accordance with a second aspect of the invention, a method is provided for driving an electro-optic display device comprised of a row-and-column matrix array of pixels, to display continuously updated image information in the form of signals arranged in successive frames, by modulating light in accordance with the signals applied during successive frame periods, wherein the method comprises the steps of:
(I) converting a first set of digital information signals to a first set of analog information signals having sampling errors;
(ii) converting a second set of digital information signals to a second set of analog information signals equal in magnitude but opposite in sign to the sampling errors of the first set;,and
(iii) alternately applying the first and second sets of converted analog signals to the array, whereby their average effect is zero.
In accordance with a preferred embodiment of the method, the first and second sets of converted analog signals are applied to alternate columns (or rows) of the array, or to alternate sets of columns (or sets of rows) during each frame period, so that sampling errors in adjacent columns (or rows), or in adjacent sets of columns (or sets of rows), are equal in magnitude but opposite in sign during each frame period.
In accordance with another preferred embodiment of the method, the first set of digital information signals are converted to analog information signals by: generating an analog ramp signal which begins at zero or a low absolute voltage value and ramps up to a maximum absolute voltage value; successively comparing the digital information signals to the analog ramp up signal; and selecting analog information signal values which correspond to the digital information signals; and the second set of digital information signals are converted to analog information signals by: generating an analog ramp signal which begins at a maximum absolute voltage value and ramps down to zero or a low absolute voltage value; successively comparing the digital information signals to the analog ramp down signal; and selecting analog information signal values which corresponds to the digital information signals.
Alternatively, the first and second sets of converted analog signals are applied to the array during alternate frame periods, so that sampling errors in alternate frames are equal in magnitude but opposite in sign. In this case, digital-to-analog conversion can be carried out by alternately generating a first analog ramp up signal and a second analog ramp down signal, and converting an entire frame of digital information signals using the first ramp up signal, and then converting the next frame using the second ramp down signal. The sampling errors are thus averaged over a time of successive frame periods, instead of being averaged over the array during each frame period. The digital information signals are converted to analog information signals by successively comparing the digital information signals to the analog ramp signal; and selecting analog information signal values which corresponds to the digital information signals.
As is known, most electro-optic display devices, and in particular liquid crystal display devices, are driven with AC voltage, commonly achieved by inverting the polarity of the driving waveform with each new frame of information. As is also known, the polarities of alternate columns (or rows), or sets of columns (or sets of rows) can also be inverted with each new frame. Nevertheless, it should be appreciated that the principles of the invention are applicable regardless of these inversions of the polarities of the driving waveform so long as the sampling errors generated in the two sets of digital information signals are equal in magniture and opposite in sign. This will be achieved regardless of the polarities of the ramp signals, so long as one of the ramp signals (herein ramp signal or waveform A) is a ramp up signal, and the other ramp signal (herein ramp signal or waveform B) is a ramp down signal.
Depending on the architecture of the decoding circuits used, the digital input signals corresponding to waveforms A and B may have to be stored in normal and complementary form, respectively.